CVE-2026-20760 (GCVE-0-2026-20760)

Vulnerability from cvelistv5 – Published: 2026-08-11 16:25 – Updated: 2026-08-12 15:47
VLAI
Summary
Improper handling of overlap between protected memory ranges in some microcode for some Intel(R) Processors within Ring 0: Hypervisor may allow an escalation of privilege. Authorized adversary with a privileged user combined with a low complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (high) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.
Severity
6.8 (Medium)
CVSS:4.0/AV:L/AC:L/AT:N/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N
SSVC
Exploitation: none Automatable: no Technical Impact: partial
CISA Coordinator · CISA-ADP (v2.0.3)
Decision recorded 2026-08-12 15:46 UTC
CWE
  • Escalation of Privilege
  • CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
Assigner
References
Impacted products
Vendor Product Version CPE status
n/a Intel(R) Processors Affected: See references
Show details on NVD website
To clipboard 

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Forecast uses a logistic model when the trend is rising, or an exponential decay model when the trend is falling. Fitted via linearized least squares.

Sightings

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Nomenclature

  • Seen: The vulnerability was mentioned, discussed, or observed by the user.
  • Confirmed: The vulnerability has been validated from an analyst's perspective.
  • Published Proof of Concept: A public proof of concept is available for this vulnerability.
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  • Not patched: The vulnerability was not observed as successfully patched by the user who reported the sighting.


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