CVE-2026-90410 (GCVE-0-2026-90410)

Vulnerability from cvelistv5 – Published: 2026-09-17 16:09 – Updated: 2026-09-17 16:09
VLAI
Title
spi: davinci: switch to managed controller allocation
Summary
In the Linux kernel, the following vulnerability has been resolved: spi: davinci: switch to managed controller allocation The controller is allocated with the non-managed spi_alloc_host() while the interrupt is registered with devm_request_threaded_irq(). During removal, spi_bitbang_stop() only unregisters the controller; the subsequent spi_controller_put() then frees the controller together with its embedded davinci_spi devdata, which is the IRQ handler's dev_id. The devm_request_threaded_irq() release action (free_irq()), which drains the handler, does not run until after .remove() returns. A late or latched interrupt can therefore reach davinci_spi_irq() and dereference already-freed memory. Switch to devm_spi_alloc_host() so that the devres LIFO order releases the controller only after free_irq() has drained the handler, and drop the now-redundant spi_controller_put() from .remove(). The probe error path is simplified to direct returns. The clock is acquired with devm_clk_get_enabled(), which is registered after the IRQ and thus released before it by the devres LIFO order. Drain the interrupt explicitly with devm_free_irq() before disabling the controller so that a late interrupt cannot access the registers of a clock-gated controller. This issue was found by an in-house static analysis tool.
Severity
No CVSS data available.
Impacted products
Vendor Product Version CPE status
Linux Linux Affected: 5b3bb5963ff23a344062aba04937533a6f575761 , < 29e37f768f35592e26477f703649bd2e6f18d857 (git)
Affected: 5b3bb5963ff23a344062aba04937533a6f575761 , < f9452eba71fbfcee55c0b8e030ee3615e9f75f65 (git)
Affected: 5b3bb5963ff23a344062aba04937533a6f575761 , < 3b544072185c3d19ddec621ec9f6897ea2d10ee3 (git)
Affected: 5b3bb5963ff23a344062aba04937533a6f575761 , < 1a7958ce58dc95b06615df00c120ece4eb9ccc86 (git)
Affected: 5b3bb5963ff23a344062aba04937533a6f575761 , < ea408a05dc8f18b4a184b88d6e19d2fd1acc1527 (git)
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Linux Linux Affected: 3.14
Unaffected: 0 , < 3.14 (semver)
Unaffected: 6.6.157 , ≤ 6.6.* (semver)
Unaffected: 6.12.110 , ≤ 6.12.* (semver)
Unaffected: 6.18.52 , ≤ 6.18.* (semver)
Unaffected: 7.2.6 , ≤ 7.2.* (semver)
Unaffected: 7.3-rc1 , ≤ * (original_commit_for_fix)
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Show details on NVD website

{
  "containers": {
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      "affected": [
        {
          "defaultStatus": "unaffected",
          "product": "Linux",
          "programFiles": [
            "drivers/spi/spi-davinci.c"
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          "vendor": "Linux",
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              "status": "unaffected",
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              "versionType": "original_commit_for_fix"
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      "cpeApplicability": [
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          "nodes": [
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              "cpeMatch": [
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      "descriptions": [
        {
          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nspi: davinci: switch to managed controller allocation\n\nThe controller is allocated with the non-managed spi_alloc_host() while\nthe interrupt is registered with devm_request_threaded_irq().  During\nremoval, spi_bitbang_stop() only unregisters the controller; the\nsubsequent spi_controller_put() then frees the controller together with\nits embedded davinci_spi devdata, which is the IRQ handler\u0027s dev_id.\nThe devm_request_threaded_irq() release action (free_irq()), which\ndrains the handler, does not run until after .remove() returns.  A late\nor latched interrupt can therefore reach davinci_spi_irq() and\ndereference already-freed memory.\n\nSwitch to devm_spi_alloc_host() so that the devres LIFO order releases\nthe controller only after free_irq() has drained the handler, and drop\nthe now-redundant spi_controller_put() from .remove().  The probe error\npath is simplified to direct returns.\n\nThe clock is acquired with devm_clk_get_enabled(), which is registered\nafter the IRQ and thus released before it by the devres LIFO order.\nDrain the interrupt explicitly with devm_free_irq() before disabling the\ncontroller so that a late interrupt cannot access the registers of a\nclock-gated controller.\n\nThis issue was found by an in-house static analysis tool."
        }
      ],
      "providerMetadata": {
        "dateUpdated": "2026-09-17T16:09:37.397Z",
        "orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "shortName": "Linux"
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        },
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          "url": "https://git.kernel.org/stable/c/3b544072185c3d19ddec621ec9f6897ea2d10ee3"
        },
        {
          "url": "https://git.kernel.org/stable/c/1a7958ce58dc95b06615df00c120ece4eb9ccc86"
        },
        {
          "url": "https://git.kernel.org/stable/c/ea408a05dc8f18b4a184b88d6e19d2fd1acc1527"
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      ],
      "title": "spi: davinci: switch to managed controller allocation",
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    "assignerShortName": "Linux",
    "cveId": "CVE-2026-90410",
    "datePublished": "2026-09-17T16:09:37.397Z",
    "dateReserved": "2026-09-11T19:38:34.812Z",
    "dateUpdated": "2026-09-17T16:09:37.397Z",
    "state": "PUBLISHED"
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        "descriptions": [
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            "lang": "en",
            "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nspi: davinci: switch to managed controller allocation\n\nThe controller is allocated with the non-managed spi_alloc_host() while\nthe interrupt is registered with devm_request_threaded_irq().  During\nremoval, spi_bitbang_stop() only unregisters the controller; the\nsubsequent spi_controller_put() then frees the controller together with\nits embedded davinci_spi devdata, which is the IRQ handler\u0027s dev_id.\nThe devm_request_threaded_irq() release action (free_irq()), which\ndrains the handler, does not run until after .remove() returns.  A late\nor latched interrupt can therefore reach davinci_spi_irq() and\ndereference already-freed memory.\n\nSwitch to devm_spi_alloc_host() so that the devres LIFO order releases\nthe controller only after free_irq() has drained the handler, and drop\nthe now-redundant spi_controller_put() from .remove().  The probe error\npath is simplified to direct returns.\n\nThe clock is acquired with devm_clk_get_enabled(), which is registered\nafter the IRQ and thus released before it by the devres LIFO order.\nDrain the interrupt explicitly with devm_free_irq() before disabling the\ncontroller so that a late interrupt cannot access the registers of a\nclock-gated controller.\n\nThis issue was found by an in-house static analysis tool."
          }
        ],
        "id": "CVE-2026-90410",
        "lastModified": "2026-09-17T17:17:40.910",
        "metrics": {},
        "published": "2026-09-17T17:17:40.910",
        "references": [
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        "sourceIdentifier": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "vulnStatus": "Received"
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    },
    "suse_vex": {
      "aggregate_severity": "moderate",
      "current_release_date": "2026-09-22T16:28:29Z",
      "cve": "CVE-2026-90410",
      "id": "CVE-2026-90410",
      "initial_release_date": "2026-09-18T00:16:41Z",
      "product_status:known_affected": "314",
      "product_status:known_not_affected": "33",
      "source": "SUSE CSAF VEX",
      "status": "interim",
      "title": "SUSE CVE CVE-2026-90410",
      "url": "https://ftp.suse.com/pub/projects/security/csaf-vex/cve-2026-90410.json",
      "version": "4"
    }
  }
}



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Forecast uses a logistic model when the trend is rising, or an exponential decay model when the trend is falling. Fitted via linearized least squares.

Sightings

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Nomenclature

  • Seen: The vulnerability was mentioned, discussed, or observed by the user.
  • Confirmed: The vulnerability has been validated from an analyst's perspective.
  • Published Proof of Concept: A public proof of concept is available for this vulnerability.
  • Exploited: The vulnerability was observed as exploited by the user who reported the sighting.
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  • Not exploited: The vulnerability was not observed as exploited by the user who reported the sighting.
  • Not confirmed: The user expressed doubt about the validity of the vulnerability.
  • Not patched: The vulnerability was not observed as successfully patched by the user who reported the sighting.

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