<?xml version='1.0' encoding='UTF-8'?>
<?xml-stylesheet href="/static/style.xsl" type="text/xsl"?>
<rss xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/" version="2.0">
  <channel>
    <title>Most recent entries from all</title>
    <link>https://vulnerability.circl.lu</link>
    <description>Contains only the most 10 recent entries.</description>
    <docs>http://www.rssboard.org/rss-specification</docs>
    <generator>python-feedgen</generator>
    <language>en</language>
    <lastBuildDate>Wed, 30 Sep 2026 15:23:12 +0000</lastBuildDate>
    <item>
      <title>CVE-2022-50370 — i2c: designware: Fix handling of real but unexpected device interrupts</title>
      <link>https://vulnerability.circl.lu/vuln/cve-2022-50370</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;i2c: designware: Fix handling of real but unexpected device interrupts&lt;/p&gt;
&lt;p&gt;Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI
IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel
Alder Lake-S where system crashes to NULL pointer dereference in
i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;).&lt;/p&gt;
&lt;p&gt;I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made
following notes:&lt;/p&gt;
&lt;p&gt;- Issue happens when resuming from S3 but not when resuming from
  &amp;#34;s2idle&amp;#34;
- PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
  system enters into pci_pm_resume_noirq() while all other i2c_designware
  PCI devices are in D3. Devices were runtime suspended and in D3 prior
  entering into suspend
- Interrupt comes after pci_pm_resume_noirq() when device interrupts are
  re-enabled
- According to register dump the interrupt really comes from the
  i2c_designware.0. Controller is enabled, I2C target address register
  points to a one detectable I2C device address 0x60 and the
  DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and
  TX_EMPTY bits are set indicating completed I2C transaction.&lt;/p&gt;
&lt;p&gt;My guess is that the firmware uses this controller to communicate with
an on-board I2C device during resume but does not disable the controller
before giving control to an operating system.&lt;/p&gt;
&lt;p&gt;I was told the UEFI update fixes this but never the less it revealed the
driver is…&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;i2c: designware: Fix handling of real but unexpected device interrupts&lt;/p&gt;
&lt;p&gt;Commit c7b79a752871 (&amp;#34;mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI
IDs&amp;#34;) caused a regression on certain Gigabyte motherboards for Intel
Alder Lake-S where system crashes to NULL pointer dereference in
i2c_dw_xfer_msg() when system resumes from S3 sleep state (&amp;#34;deep&amp;#34;).&lt;/p&gt;
&lt;p&gt;I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made
following notes:&lt;/p&gt;
&lt;p&gt;- Issue happens when resuming from S3 but not when resuming from
  &amp;#34;s2idle&amp;#34;
- PCI device 00:15.0 == i2c_designware.0 is already in D0 state when
  system enters into pci_pm_resume_noirq() while all other i2c_designware
  PCI devices are in D3. Devices were runtime suspended and in D3 prior
  entering into suspend
- Interrupt comes after pci_pm_resume_noirq() when device interrupts are
  re-enabled
- According to register dump the interrupt really comes from the
  i2c_designware.0. Controller is enabled, I2C target address register
  points to a one detectable I2C device address 0x60 and the
  DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and
  TX_EMPTY bits are set indicating completed I2C transaction.&lt;/p&gt;
&lt;p&gt;My guess is that the firmware uses this controller to communicate with
an on-board I2C device during resume but does not disable the controller
before giving control to an operating system.&lt;/p&gt;
&lt;p&gt;I was told the UEFI update fixes this but never the less it revealed the
driver is…&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://vulnerability.circl.lu/vuln/cve-2022-50370</guid>
    </item>
  </channel>
</rss>
