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  <updated>2026-10-01T19:26:21.030283+00:00</updated>
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  <entry>
    <id>https://vulnerability.circl.lu/vuln/cve-2026-45944</id>
    <title>CVE-2026-45944 — iommu/vt-d: Clear Present bit before tearing down context entry</title>
    <updated>2026-10-01T19:26:21.032313+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p><strong>Affected:</strong> Linux</p>
<p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>iommu/vt-d: Clear Present bit before tearing down context entry</p>
<p>When tearing down a context entry, the current implementation zeros the
entire 128-bit entry using multiple 64-bit writes. This creates a window
where the hardware can fetch a "torn" entry — where some fields are
already zeroed while the 'Present' bit is still set — leading to
unpredictable behavior or spurious faults.</p>
<p>While x86 provides strong write ordering, the compiler may reorder writes
to the two 64-bit halves of the context entry. Even without compiler
reordering, the hardware fetch is not guaranteed to be atomic with
respect to multiple CPU writes.</p>
<p>Align with the "Guidance to Software for Invalidations" in the VT-d spec
(Section 6.5.3.3) by implementing the recommended ownership handshake:</p>
<p>1. Clear only the 'Present' (P) bit of the context entry first to
   signal the transition of ownership from hardware to software.
2. Use dma_wmb() to ensure the cleared bit is visible to the IOMMU.
3. Perform the required cache and context-cache invalidation to ensure
   hardware no longer has cached references to the entry.
4. Fully zero out the entry only after the invalidation is complete.</p>
<p>Also, add a dma_wmb() to context_set_present() to ensure the entry
is fully initialized before the 'Present' bit becomes visible.</p></div>
    </content>
    <link href="https://vulnerability.circl.lu/vuln/cve-2026-45944"/>
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